ETH is facing problems such as high gas fees and congestion, while ZK hardware acceleration can assist in achieving real-time proofs and meet the requirements of ZKRollup in peripheral conditions. This article is sourced from an article written by “Yuzhong Kuangshui” and compiled, translated, and written by PANews.
(Opener:
Detailed Explanation of Based Rollup: How to Solve the Challenges Faced by Optimistic and ZK
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(Context Supplement:
What’s Next for Ethereum Layer2: How ZK Technology Can Unleash New Market Potential?
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Opportunities in the blockchain often come from “solving market demands.” How do we understand this? Let’s take an example that everyone can understand. In the last cycle, DeFi Summer on ETH was hot, but it also led to problems such as high gas fees and congestion. BSC emerged during that period, and accordingly, many wealth opportunities appeared.
In addition to BSC, there are also well-known opportunities such as Solana, Avalanche, and other Alt-Layer1.
The same goes for NFT Summer. With the rise in ETH prices, the market urgently needs new wealth opportunities in the ecosystem to earn and accumulate ETH, or to leverage ETH. Therefore, NFTs have become a hot topic.
What is ZK hardware acceleration?
The same goes for ZK hardware acceleration. ZK hardware acceleration aims to solve the problem of “inefficient ZK-SNARK proof generation.”
In previous conferences, Vitalik Buterin mentioned that ZK-SNARK proof generation takes too long (about 20 minutes) and is inefficient. Ideally, real-time proofs would be preferred. To solve this problem, Vitalik Buterin proposed three solutions: “parallelization and aggregation tree,” “using SNARK algos and hash to improve efficiency,” and “using ASIC for ZK hardware acceleration.”
From my understanding, the first two solutions aim to improve ZKP efficiency from a technological upgrade perspective, which requires time for improvement (to be honest, I don’t fully understand, so I can only grasp the surface). On the other hand, using “ASIC for ZK hardware acceleration” is like some people in the gaming world adding an auxiliary spirit to their mouse, using peripheral devices to solve the problem of low ZKP efficiency.
ZK hardware acceleration can be divided into GPU, FPGA, and ASIC. Why did Vitalik Buterin specifically mention ASIC? It’s because, from the perspective of flexibility, GPU > FPGA > ASIC, while from the perspective of performance, ASIC > FPGA > GPU.
In simple terms, GPUs are general-purpose, while ASICs are customized and specialized. General-purpose means that everyone can use them, but their performance advantages are not so obvious. ASIC chips can only adapt to a single solution, while FPGAs are in between ASICs and GPUs, having a certain level of flexibility and performance stronger than GPUs but weaker than ASICs.
Overall, ASIC can provide higher computational efficiency for ZKP because the current ZKP proof technology is relatively fixed. When ZKRollup seeks ZK hardware acceleration, GPUs are a universal solution, but in the future, customized high-performance ASIC chips will obviously be the best solution.
Currently, the leading project in ZK hardware acceleration is Cysic, led by Polychain.
Many people have provided detailed introductions to Cysic, but as a non-technical person, I can only share my understanding. Friends who are interested in the technology itself can visit the official website or media reports for more information.
Cysic’s hardware acceleration solution consists of two parts: ZKVM+ hardware design (GPU+ASIC). Currently, Cysic provides GPU acceleration solutions for ZKRollup, such as Scroll (Cysic has already reserved nearly 100,000 GPU devices, and its advantage lies in GPU computing power, but the focus will shift to ASIC chips in the future).
ZKVM is a virtual machine environment that supports ZK circuits, and its main advantages are continuity and parallelism. Simply put, when dealing with a large cake, high requirements are placed on computing devices, bandwidth, and memory. ZKVM allows us to cut the cake into small pieces, making it convenient for us to eat, with higher controllability and compatibility. Parallelism allows us to cut and consume the cake at the same time, improving efficiency.
In terms of hardware design, Cysic combines an executor, which is something used for calculations, with a certain number of ZKVM chips and other necessary hardware in one box. This way, the device’s flexibility in calculations and portability in the physical world are improved.
In short, Cysic’s design is based on considerations of cost-effectiveness and energy efficiency.
Lastly, let me share my thoughts.
Why pay attention to the ZK hardware acceleration track? It is based on optimism about the future development of ZKRollup. ZK hardware acceleration can assist in achieving real-time proofs in peripheral conditions, thus meeting the requirements of ZKRollup.
Therefore, when the ZKRollup narrative becomes popular, we can definitely take a look at projects related to ZK hardware, which may also present speculative opportunities. Personally, I think it’s not too late to speculate when the ZK narrative begins to gain attention (which may be a bit difficult this year).
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